;**************************************************************************
;*          K8048  Microchip PIC(tm) Programmer & Experiment board        *
;*          Hardw. Rev: P8048'1          Softw. Rev:  1.02                *
;*          OSC.......: XT 4MHz Max.     POWER.....:  15V DC              *
;**************************************************************************
;	Lewis Loflin lewis@bvu.net
;	Related pages:
;	http://www.bristolwatch.com/k150/f84e.htm
;	http://www.bristolwatch.com/k150/f84b.htm
;	http://www.bristolwatch.com/k150/f84a.htm
;	http://www.bristolwatch.com/k150/f84c.htm
;	http://www.bristolwatch.com/k150/f84d.htm
;==========================================================================
;	 Tutor example file: f84timerIRQ.asm
;       
;	'TMR0 interrupt routine delay toggle LED1 every second.' 
;==========================================================================

	

;==========================================================================
;
;       Configuration Bits
;
;==========================================================================

_CP_ON                       EQU     H'000F'
_CP_OFF                      EQU     H'3FFF'
_PWRTE_ON                    EQU     H'3FF7'
_PWRTE_OFF                   EQU     H'3FFF'
_WDT_ON                      EQU     H'3FFF'
_WDT_OFF                     EQU     H'3FFB'
_LP_OSC                      EQU     H'3FFC'
_XT_OSC                      EQU     H'3FFD'
_HS_OSC                      EQU     H'3FFE'
_RC_OSC                      EQU     H'3FFF'

	__CONFIG        _CP_OFF & _PWRTE_ON & _WDT_OFF & _XT_OSC 


;==========================================================================
;
;       Register Definitions
;
;==========================================================================

W                            EQU     H'0000'
F                            EQU     H'0001'

;----- Register Files------------------------------------------------------

INDF                         EQU     H'0000'
TMR0                         EQU     H'0001'
PCL                          EQU     H'0002'
STATUS                       EQU     H'0003'
FSR                          EQU     H'0004'
PORTA                        EQU     H'0005'
PORTB                        EQU     H'0006'
EEDATA                       EQU     H'0008'
EEADR                        EQU     H'0009'
PCLATH                       EQU     H'000A'
INTCON                       EQU     H'000B'

OPTION_REG                   EQU     H'0081'
TRISA                        EQU     H'0085'
TRISB                        EQU     H'0086'
EECON1                       EQU     H'0088'
EECON2                       EQU     H'0089'

;----- STATUS Bits --------------------------------------------------------

IRP                          EQU     H'0007'
RP1                          EQU     H'0006'
RP0                          EQU     H'0005'
NOT_TO                       EQU     H'0004'
NOT_PD                       EQU     H'0003'
Z                            EQU     H'0002'
DC                           EQU     H'0001'
C                            EQU     H'0000'

;----- INTCON Bits --------------------------------------------------------

GIE                          EQU     H'0007'
EEIE                         EQU     H'0006'
T0IE                         EQU     H'0005'
INTE                         EQU     H'0004'
RBIE                         EQU     H'0003'
T0IF                         EQU     H'0002'
INTF                         EQU     H'0001'
RBIF                         EQU     H'0000'

;----- OPTION_REG Bits ----------------------------------------------------

NOT_RBPU                     EQU     H'0007'
INTEDG                       EQU     H'0006'
T0CS                         EQU     H'0005'
T0SE                         EQU     H'0004'
PSA                          EQU     H'0003'
PS2                          EQU     H'0002'
PS1                          EQU     H'0001'
PS0                          EQU     H'0000'

;----- EECON1 Bits --------------------------------------------------------

EEIF                         EQU     H'0004'
WRERR                        EQU     H'0003'
WREN                         EQU     H'0002'
WR                           EQU     H'0001'
RD                           EQU     H'0000'

;==========================================================================
;
;       RAM Definition
;
;==========================================================================

        __MAXRAM H'CF'
        __BADRAM H'07', H'50'-H'7F', H'87'

;==========================================================================
;
;       Variables
;
;==========================================================================

;INPUTS
SW1		EQU     H'00'		;SW1 is triggering RA0
SW2		EQU     H'01'		;SW2 is triggering RA1
SW3		EQU     H'02'		;SW3 is triggering RA2
SW4		EQU     H'03'		;SW4 is triggering RA3
;OUTPUTS
LD1		EQU	H'00'		;LD1 is connected to RB0
LD2		EQU	H'01'		;LD2 is connected to RB1
LD3		EQU	H'02'		;LD3 is connected to RB2
LD4		EQU	H'03'		;LD4 is connected to RB3


;TIMER1          EQU     H'0C'   ;Timer 1, Used for general delay.		
;COUNT1          EQU     H'0F'
CNT             EQU     H'11'

		ORG	0			;Setting Reset vector, reset vector address is 000h in PIC16F84
		GOTO	SETUP			;Jump to RESET procedure when boot-up PIC device.


ORG     0x004  ; interrupt vector location
; ISR code can go here or be located as a call subroutine elsewhere

	DECFSZ CNT 
	GOTO $+7
	MOVLW B'00000001'
	XORWF PORTB, F
	MOVLW D'10' ; 50mS * value
	MOVWF CNT
	MOVLW D'60' ; preload value
	MOVWF TMR0
	bcf INTCON, T0IF ; clr TMR0 interrupt flag	
	retfie  ; return from interrupt

SETUP	; setup registers		
		
	BSF	STATUS, RP0		    ;Jump to bank 1 of PIC16F84 to access special registers.
	MOVLW	B'00001111'		;Config Port A, Low nibble = Ra0 -> Ra3 are inputs, high nibble not implemented.
	MOVWF	TRISA			;Set I/O configuration for PORTA
	MOVLW	B'11000000'		;Config Port B, RB7 & RB6 are input, RB5...RB0 are outputs.
	MOVWF	TRISB			;Set I/O configuration for PORTB
	; setp TMR0 operation
	movlw b'10000111' ; internal clock, pos edge, prescale 256
	movwf OPTION_REG
	BCF	STATUS, RP0 ; BANK 0	
	; 256uS * 195 =~ 50mS
	; 255 - 195 = 60
	MOVLW D'60'
	MOVWF TMR0 ; preload timer value
	; setup TMR0 INT
	bsf INTCON, GIE ; enable global interrupt
	bsf INTCON, T0IE ; enable TMR0 interrupt
	bcf INTCON, T0IF ; clr TMR0 interrupt flag to turn on, 
	; must be cleared after interrupt

	MOVLW D'10' ; 50mS * 20 = 1 Sec.
	MOVWF CNT

goto LOOP

LOOP ;Loop starts here !!!
; do nothing
GOTO  LOOP


	    END  ;End of source code.


 
